This application claims the benefit of a Japanese Patent Application No.2004-244052 filed Aug. 24, 2004, in the Japanese Patent Office, the disclosure of which is hereby incorporated by reference.
1. Field of the Invention
The present invention generally relates to access control methods, disk control units and storage apparatuses, and more particularly to an access control method for a cache memory that is segmented into a plurality of cache segments, a disk control unit for controlling a disk unit by such an access control method, and a storage apparatus using such an access control method.
2. Description of the Related Art
A disk control unit which controls a disk unit having a plurality of magnetic disks improves the access performance (or access speed) by increasing the storage capacity of a cache memory that is provided within the disk control unit. In such a disk control unit, an access from a host unit is processed via the cache memory within the disk control unit. In other words, when an access command from the host unit is a read command that hits data in the cache memory, the data are transferred from the cache memory to the host unit without carrying out a read process, that is, without carrying out a staging process, from the disk unit. On the other hand, when the access command from the host unit is a write command, write data from the host unit are temporarily stored in the cache memory, and a write-back to the disk unit is made asynchronously, that is, a background write-back is made, after the write command ends. Hence, when the access command from the host unit hits the data in the cache memory, the data in the cache memory are immediately transferred to the host unit so as to improve the access performance.
The cache memory within the disk control unit is segmented into cache segments, and is managed in units of cache segments. For example, the cache segment is set to 16 kB, 64 kB or the like. In the disk control unit, allocation and purge are made in units of cache segments, so as to manage the data in the cache memory.
For example, in the disk control apparatus having the cache segment set to 64 kB, for example, if a 8 kB write command is issued from the host unit, 1 cache segment (64 kB) is allocated for the processing of the write command within the disk control unit, and the write data are received. During this write data reception, in order to avoid collision (or access contention) with other write commands, the cache segment is set to an “in-use” state to carry out an exclusive control which will hereinafter be referred to as a “cache segment exclusive control”.
A Japanese Laid-Open Patent Application No.7-319771 proposes a disk control unit that optimizes a cache segment capacity with respect to an amount of data transfer. In addition, a Japanese Laid-Open Patent Application No.2000-227865 proposes a method of improving a utilization efficiency of the cache memory by setting cache regions to cache segments having an optimum segment size reflecting logical characteristics at the time of making a read or write process with respect to the disk.
The cache segment exclusive control carries out the exclusive control in units of cache segments even in a case where an access range is small, to thereby affect the access performance. For example, in the case of a sequential write access that successively writes 8 kB data, even if the next write command is received while the first 8 kB data is being written, the next write command must wait by the cache segment exclusive control because the cache segment is in use by the previous write command. In addition, the write command next to the next write command must also wait, and up to 7 such 8 kB write commands must wait in a worst case and be sequentially processed one by one.
The regions within the cache memory subject to the cache segment exclusive control become smaller if the cache segments are made smaller. For this reason, it is possible to improve the utilization efficiency of the cache memory, and reduce the waiting in the case of the sequential access. However, if the cache segments are small, the management of the regions within the cache memory becomes that much more complex, thereby making it difficult to improve the access performance.
On the other hand, the management of the regions within the cache memory becomes simpler if the cache segments are made larger, thereby improving the access performance to a certain extent. However, if the cache segments are large, the utilization efficiency of the cache memory deteriorates. In addition, the waiting in the case of the sequential access increases, to deteriorate the access performance of the sequential access. Therefore, the cache segments are conventionally set to a size that will not make the management of the regions within the cache memory extremely complex.